TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations Article

Liu, Zihao, Mao, Mengjie, Liu, Tao et al. (2018). TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations . IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 37(10), 10.1109/TCAD.2017.2783860



Industry Collaboration International Collaboration

cited authors

  • Liu, Zihao; Mao, Mengjie; Liu, Tao; Wang, Xue; Wen, Wujie; Chen, Yiran; Li, Hai; Wang, Danghui; Pei, Yukui; Ge, Ning

fiu authors

publication date

  • October 2018

Digital Object Identifier (DOI)

volume

  • 37

issue

  • 10