Epilepsy is the most frequent neurological disorder other than stroke. The electroencephalogram (EEG) is the main tool used in monitoring and recording brain signals. In this study, we target two detection algorithms that are essential in the diagnosis of epileptic patients. These algorithms detect high frequency oscillations (HFO) and interictal spikes (IIS) in subdural EEG recordings respectively. This paper presents the efforts on porting both EEG processing algorithms into Intel's concept vehicle, the single-chip cloud computer (SCC), a fully programmable 48-core prototype provided with an on-chip network along with advanced power management technologies and support for message-passing. Several experiments are presented for different SCC configurations, where we vary the number of cores used and their respective voltage/frequency settings. The application was decomposed into two execution regions (i.e., load and execution). Results are presented in the form of performance, power, energy, and energy-delay product (EDP) metrics for each experiment.